o5r/plan9port
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

more pthread

Browse source
This commit is contained in:
rsc 2005-02-11 00:01:49 +00:00
parent ce2a378d46
commit 281c90a5be
8 changed files with 132 additions and 115 deletions
Download patch file Download diff file Expand all files Collapse all files

6
src/cmd/acid/expr.c
View file

@ -135,7 +135,7 @@ oindm(Node *n, Node *res)
res->store.comt = l.store.comt;
break;
case TREG:
indirreg(correg, l.store.u.reg, l.store.fmt, res);
indirreg(threadregs(l.store.u.reg.thread), l.store.u.reg.name, l.store.fmt, res);
res->store.comt = l.store.comt;
break;
case TCON:
@ -334,7 +334,7 @@ oasgn(Node *n, Node *res)
case OINDM:
expr(lp->left, &aes);
if(aes.type == TREG)
windirreg(correg, aes.store.u.reg, n->right, res);
windirreg(threadregs(aes.store.u.reg.thread), aes.store.u.reg.name, n->right, res);
else
windir(cormap, aes, n->right, res);
break;
@ -1097,7 +1097,7 @@ acidregsrw(Regs *r, char *name, ulong *u, int isr)
werrstr("*%s: register %s not mapped", name, v->store.u.reg);
return -1;
}
return rget(correg, v->store.u.reg, u);
return rget(threadregs(v->store.u.reg.thread), v->store.u.reg.name, u);
case TCON:
n = v->store.u.con;
if(n->op != OCONST || n->type != TINT){